What you will do

Estimating layout size and resource requirements.
Work with designer in floor plan of the chip.
Work with designer to ensure high quality layout and to meet process requirement.
Work with designer to implement layout design, configure foundry DRC/LVS rules and perform physical verifications on completed layout such as DRC, LVS, ERC, Antenna, Density, EM, IR, etc..
Support designer to do potential failure mode analysis such as electro-migration, ESD & Latch-up.

What you will need

BSEE, or equivalent.
2+ years’ experience in Analog layout.
Familiar with Linux, capable of setting layout environment.0.13um, 0.18um, 90nm or 65nm and experience in IC tape-outs.
Strong time management skills that enable on-time project delivery.
- Demonstrated ability to create quick solutions in order to keep designers productive is crucial.
Ability to work in teams and collaborate effectively with people in different functions.
Good oral and written English communication skills.
Experience in Cadence Dracula, Caliber is essential.
Experience about of CMOS

Nexperia is an Equal Opportunity/Affirmative Action Employer.

Nexperia Germany GmbH Hiring for Senior Layout Engineer at Remote Full Time

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