Intel Hiring for C++ Software Engineer Job at Bath, England Full Time

Intel is seeking candidates to join the XFG (Switch & Fabric Group) within Networking and Edge Division (NEX) as a C++ Software Engineer in our Modelling team. XFG is a strong, vibrant cross-site team which helps drive Intel’s programmable switching technology and products to position Intel Tofino as the ethernet switching platform of choice and for the Cloud and Data Center network deployments. Our Modelling team is based across sites in the UK, Denmark and Poland.

This role is either virtual in the UK (although we are mostly based around Bath), or at our site in Helev, Denmark.

Our unified Model supports all of our Tofino Switching ASICs and is central to XFG’s development, being used by the Design Validation, Silicon Validation, Driver, Compiler and Advanced Applications teams as well as the majority of CI. The Model is also supplied to customers as part of Intel P4 Studio.

Job Summary:
Development and enhancement of the switch ASIC C++ Reference Model

Primary Responsibilities:

• Understand the architecture of the switch and the functional blocks being modelled.
• Contribute to the development of the C++, register accurate reference model.
• Work with the Logic Design and Architecture teams to ensure the design is properly documented and catch inconsistencies and errors early.
• Debug functional and performance bugs with the Design Verification and Silicon Validation teams.
• Work with the Compiler, Driver, Advanced Applications and Customer Engineering team to add new model features and debug issues.
• Help maintain and enhance the model’s CI using Jenkins and Docker.

Minimum Qualifications:

• Skilled with C++/Java and Python or other scripting language (good OOP habits, attention to code reuse, produces well-structured, quality code)
• Experience with software development tools and flow (eg for version control, CI)
• BSEE/CS + 5 years of experience
• MSEE/CS + 3 years of experience

Preferred Qualifications:

• Experience with Networking concepts
• Some knowledge of hardware design and verification (SystemVerilog, UVM)
• MSEE/CS + 6 years of experience