INTEL Hiring for Analog Engineer at San Francisco, CA Full Time

Job Description

As a member of the Advanced Design Library technology group in TMG DE, you will be at the vanguard of designing analog foundational collateral on leading edge Intel processes to meet density and performance scaling goals of Intel CPU and SoC products. AD serves as the design interface with the process development team working out key design process interactions for all new processes. These collaterals include ESD diodes, Power clamps, analog transistors, resistors, capacitors, thermal sensing devices, and others.

Your responsibilities will include, but are not limited to:

• You will be responsible to drive on-time library PDK release with highest quality, coordinate with the design owners and multiple stake holders in device, integration, OPC, DR, and runset for customer solutions.
• Ensure the timely development and test coverage to cover possible design usage scenario.
• Definition of copy exact foundational IP in collaboration with analog and IO designers in product groups and AD to support ESD protection needs in balancing ESD protection against the performance impact to the IO designs.
• Working with process device and reliability stake holders as part of DTCO to co optimize design, process modeling and design rules.
• Designing library collateral schematics and layouts, and characterizing them through all PV RV and ESD flows. #DesignEnablement

Qualifications

Bachelors degree in Electrical Engineering or related field with 18+ years, OR Masters degree with 15+ years of professional experience in analog circuit, device physics fundamentals, OR Ph.D. with 10+ years of experience in the same fields of study.

Preferred Qualifications:
10+ years’ experience in the following areas:

• Coding skills in some language to improve work efficiency is a bonus.
• Project management skill with attention to details

Inside this Business Group

As the world’s largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art – from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Covid Statement

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in US, California: $180,270.00-$288,770.00

• Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Position of Trust
This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

JobType

Hybrid